Microchip MPLABX XC8 PIC18F2550 Timer0 example

Below is a 16-bit Timer0 example for the PIC18F2550 using the XC8 1.38 compiler.

I’ve included two examples: INITCONbits and straight up INTCON.

Why? Well, In one project, the XC8 compiler bitched with:
C:\Program Files (x86)\Microchip\xc8\v1.38\include\pic18f2550.h:8051: error: (1098) conflicting declarations for variable “_INTCONbits” (C:\Program Files (x86)\Microchip\xc8\v1.38\include\pic18f2550.h:7735)

I didn’t redeclare INTCONbits, but it sure says I did. To remedy the error, I manually set INTCON…

This is only known to compile on the MPLABX 3.40 IDE with the XC8 1.38 Compiler. To get it to work with another IDE, compiler, rewrite in ASM, an AVR, another PIC, etc.. Sorry to be a dick, but figure it out for yourself.

Kudos: The bare metal timer code was pulled from http://electronics.stackexchange.com/questions/138784/timer0-interruption-xc8

There may be some code formatting issues thanks to WordPress. Remove the space between the ‘c’ and ‘.’ in the xc include file line: “#include ”

// 
// PIC18F2550 Configuration Bit Settings

// CONFIG1L
#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CPUDIV = OSC4_PLL6// System Clock Postscaler Selection bits ([Primary Oscillator Src: /4][96 MHz PLL Src: /6])
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = ECPLLIO_EC// Oscillator Selection bits (EC oscillator, PLL enabled, port function on RA6 (ECPIO))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = OFF        // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 0         // Brown-out Reset Voltage bits (Maximum setting 4.59V)
#pragma config VREGEN = OFF     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 1        // Watchdog Timer Postscale Select bits (1:1)

// CONFIG3H
#pragma config CCP2MX = OFF     // CCP2 MUX bit (CCP2 input/output is multiplexed with RB3)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = OFF      // MCLR Pin Enable bit (RE3 input pin enabled; MCLR pin disabled)

// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = ON         // Code Protection bit (Block 0 (000800-001FFFh) is code-protected)
#pragma config CP1 = ON         // Code Protection bit (Block 1 (002000-003FFFh) is code-protected)
#pragma config CP2 = ON         // Code Protection bit (Block 2 (004000-005FFFh) is code-protected)
#pragma config CP3 = ON         // Code Protection bit (Block 3 (006000-007FFFh) is code-protected)

// CONFIG5H
#pragma config CPB = ON         // Boot Block Code Protection bit (Boot block (000000-0007FFh) is code-protected)
#pragma config CPD = ON         // Data EEPROM Code Protection bit (Data EEPROM is code-protected)

// CONFIG6L
#pragma config WRT0 = ON        // Write Protection bit (Block 0 (000800-001FFFh) is write-protected)
#pragma config WRT1 = ON        // Write Protection bit (Block 1 (002000-003FFFh) is write-protected)
#pragma config WRT2 = ON        // Write Protection bit (Block 2 (004000-005FFFh) is write-protected)
#pragma config WRT3 = ON        // Write Protection bit (Block 3 (006000-007FFFh) is write-protected)

// CONFIG6H
#pragma config WRTC = ON        // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are write-protected)
#pragma config WRTB = ON        // Boot Block Write Protection bit (Boot block (000000-0007FFh) is write-protected)
#pragma config WRTD = ON        // Data EEPROM Write Protection bit (Data EEPROM is write-protected)

// CONFIG7L
#pragma config EBTR0 = ON       // Table Read Protection bit (Block 0 (000800-001FFFh) is protected from table reads executed in other blocks)
#pragma config EBTR1 = ON       // Table Read Protection bit (Block 1 (002000-003FFFh) is protected from table reads executed in other blocks)
#pragma config EBTR2 = ON       // Table Read Protection bit (Block 2 (004000-005FFFh) is protected from table reads executed in other blocks)
#pragma config EBTR3 = ON       // Table Read Protection bit (Block 3 (006000-007FFFh) is protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = ON       // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is protected from table reads executed in other blocks)
// 

#include         /* XC8 General Include File */

#define _XTAL_FREQ 40000000

int timerCounter = 0, whileCounter = 0;

void SetupTimer();
void ResetTimer();
void interrupt low_priority ISR(void);

unsigned int _TMR0H = 0;
unsigned int _TMR0L = 0;

void main(void)
{
    SetupTimer();
    
    while (1)
    {
        whileCounter++;
        __delay_ms(10);
    }
}

//#define USE_INTCONbits

#ifdef USE_INTCONbits
// 
void SetupTimer()
{
    unsigned int period = 0;
    
    // Set up TIMER0
    T0CONbits.T08BIT = 0; // 16-bit
    T0CONbits.T0CS = 0; // Internal clock
    T0CONbits.PSA = 1; // No prescaler

    period = (_XTAL_FREQ / 4) / 1000;
    period = 0xFFFF - period;

    _TMR0H = period >> 8;
    _TMR0L = period & 0xFF;

    ResetTimer();

    INTCONbits.T0IF = 0; // Clear the flag
    INTCONbits.T0IE = 1; // Enable the interrupt
    INTCONbits.PEIE = 1; // Enable peripheral interrupts
    INTCONbits.GIE = 1; // Enable global interrupts
    T0CONbits.TMR0ON = 1; // Set the period.
}

void ResetTimer()
{
    //Clear bits
    INTCONbits.T0IF = 0;
            
    TMR0H = _TMR0H;
    TMR0L = _TMR0L;
}

void interrupt low_priority ISR(void)
{
    if (INTCONbits.TMR0IE && INTCONbits.T0IF)
    {
        ResetTimer();
        timerCounter++;
    }
}
// 
#else
// 
void SetupTimer()
{
    unsigned int period = 0;
    
    T0CONbits.T08BIT = 0; // 16-bit
    T0CONbits.T0CS = 0; // Internal clock
    T0CONbits.PSA = 1; // No prescaler

    period = (_XTAL_FREQ / 4) / 1000;
    period = 0xFFFF - period;
    
    _TMR0H = period >> 8;
    _TMR0L = period & 0xFF;

    ResetTimer();
    
    //Toggle bits
    INTCON ^= 0xE0;//0x07;

    T0CONbits.TMR0ON = 1; // Set the period.
}

void ResetTimer()
{
    //Clear bits
    INTCON &= ~(0x04);
            
    TMR0H = _TMR0H;
    TMR0L = _TMR0L;
}

void interrupt low_priority ISR(void)
{
    if ((INTCON & 0x20)>0 && (INTCON & 0x04)>0)
    {
        ResetTimer();
        timerCounter++;
    }
}
// 
#endif